1. Field of the Invention
Embodiments of the present invention relate to a semiconductor device having a semiconductor chip mounted thereon and conductive posts and a method for manufacturing the same, and more particularly, to a semiconductor device in which conductive posts are bonded by metal particle bonding using metal nanoparticles and a method for manufacturing the same.
2. Discussion of the Background
FIGS. 6A and 6B are diagrams illustrating a configuration of a conventional semiconductor device disclosed in Japanese Patent Application Publication No. 2009-64852 (“Patent Document 1”), in which FIG. 6A is a general cross-sectional view of a main part and FIG. 6B is an enlarged view of a portion indicated by B in FIG. 6A. A semiconductor power module which is a conventional semiconductor device has a structure in which a semiconductor chip 106 is bonded to a direct copper bonding (DCB) substrate 104 which is an insulating substrate with conductive patterns by a bonding material 105 such as a solder, and electric wires on the surface of the semiconductor chip 106 are bonded to a printed circuit board 109 having conductive posts 108 by a bonding material 107 such as a solder. In this structure, the semiconductor chip 106 and the DCB substrate 104 are sealed by a sealing resin 111 to form the semiconductor power module. The DCB substrate 104 includes a heat sink 101, an insulating substrate 102, and a circuit pattern 103.
FIG. 7 is a cross-sectional view of a main part of another conventional semiconductor device disclosed in Japanese Patent Application Publication No. 2011-114040 (“Patent Document 2”). A semiconductor power module which is another conventional semiconductor device is a resin-sealed semiconductor power module similarly to FIGS. 6A and 6B. Patent Document 2 discloses a supporting plate 206 corresponding to the printed circuit board 109 of FIGS. 6A and 6B and conductive posts 205 connected thereto and a method for manufacturing the same. In the drawing, reference numeral 201 is a heat sink, reference numeral 202 is a conductive material, reference numeral 203 is a semiconductor chip, reference numeral 204 is a conductive material, reference numeral 207 is a connection substrate, and reference numeral 208 is an external leadout terminal.
Moreover, Japanese Patent Application Publication No. H7-106491 (“Patent Document 3”) indicates that at least a distal end portion or an entire portion of a conductive post which is a plurality of pins is formed in a hollow pipe shape, and a solder fillet is formed on outer and inner surfaces of the conductive post, whereby a bonding area of a solder bonding portion is increased and a bonding strength can be improved. Moreover, it is also indicated that a solder paste or a solder is attached in advance to the distal end portion of the hollow pipe-shaped conductive post and mounting is performed, whereby soldering defects can be prevented. Moreover, it is also indicated that a spherical or semi-spherical portion is formed in the distal end of the conductive post, whereby the surface area of the distal end portion of the conductive post is increased, a solder bonding area is increased, and a decrease in the reliability of the solder bonding portion can be prevented.
In the semiconductor power module which is the semiconductor device of Patent Document 1, the semiconductor chip 106 and the DCB substrate 104 are bonded, and electrodes on the surface of the chip 106 are collectively connected by the conductive posts 108 instead of aluminum wires to form wirings. In this way, a current path of the DCB substrate 104, the semiconductor chip 106, and the printed circuit board 109 is formed. When a solder is used as a bonding material 107, solders are disposed in the bonding portions of the upper and lower electrodes of the chip 106 and are heated and cooled, whereby bonding is completed.
However, when a wide band gap (WBG) semiconductor device such as a silicon carbide (SiC) device or a gallium nitride (GaN) device is mounted, the semiconductor power module needs to operate in high temperatures in order to take advantage of the merits thereof. When the operating temperature reaches 200° C. or higher, the use of solder is difficult from the perspective of reliability.
Moreover, a silicon carbide (SiC) device such as a SiC-MOSFET (MOS-type field effect transistor) or a SiC-SBD (Schottky barrier diode) has a small chip size (for example, approximately 3 mm by 3 mm). Due to this, a gate pad of a SiC-MOSFET is very small, and the size thereof is approximately 200 μm by 200 for example. It is difficult to fix conductive posts to such a small gate pad with high accuracy.
According to the conductive posts of the semiconductor devices disclosed in Patent Documents 1 to 3 and the bonding method thereof, it is difficult to solve these problems.